As a structure of a power-system semiconductor device (power module), a structure in which a semiconductor element (hereinafter also referred to as a semiconductor chip or simply referred to as a chip) and an insulating substrate are bonded by soldering or others or a structure in which an insulating substrate and a metal plate for heat dissipation are bonded by soldering or others has been known.
In recent years, development of semiconductor devices using a wide-gap semiconductor made of SiC (silicon carbide), GaN (gallium nitride), or others which can be operated at a high temperature and in which a weight and a size of a device can be reduced has been advanced. Generally, while a semiconductor element of Si (silicon) has an upper limit operating temperature of 150 to 175° C., a semiconductor element of SiC can be used at 175° C. or higher.
Also, while solder which is a connecting member for use in electrical connection among components of an electrical and electronic apparatus generally contains lead (Pb), regulation for the lead has started in recent years because of the increase of awareness for environmental problem. For example, in Europe, the ELV directive (End of Life Vehicles directive, directive for discarded automobiles) for regulating the use of lead inside automobiles has been executed. Also in Europe, the RoHs (Restriction of the use of certain Hazardous Substances in electrical and electronic equipment) directive for prohibiting the use of lead inside electrical and electronic apparatuses has been executed.
Previously, lead-containing solder had been used as a connecting member for semiconductor devices requiring high heat resistance, particularly, for semiconductor devices for use in the field of automobiles, construction machines, railways, information apparatuses, or others. However, in order to reduce an environmental burden, it has been strongly required to use lead-free connecting members.
Patent Document 1 (Japanese Patent Application Laid-open Publication (Translation of PCT Application) No. H08-509844) describes that “an object of the present invention relates to a power semiconductor element in which a ceramic substrate (SUB) and a metal bottom plate (BP) are bonded to each other via a bonding layer (2), a buffer layer (DP) made of a material with a low yield point and a high thermal conductivity, and another bonding layer (3) in this order, and in which a mechanical bonding between the ceramic substrate and the bottom plate has a high shearing strength, and besides, physical fatigue and crack formation at an early stage due to different thermal expansions of the ceramic substrate and the bottom plate from each other are avoided by plastic deformation of the buffer layer”, and describes that “the bonding layer is such a sintered silver powder layer as being advantageously used in a power semiconductor element in, for example, a low-temperature bonding technique (refer to Abstract).”
Also, Patent Document 2 (Japanese Patent Application Laid-open Publication No. 2012-28674) describes that “a semiconductor element 3, a first buffer plate 7A whose one surface is bonded to an electrode of the semiconductor element 3 via a bonding member 6a, a second buffer plate 7B whose one surface is bonded to the other surface of the first buffer plate 7A via a bonding member 6b, and a wiring member 4 bonded to the other surface of the second buffer plate 7B are provided, describes that the first buffer plate 7A has a liner expansion coefficient αBA between a liner expansion coefficient αC of the semiconductor element and a liner expansion coefficient αW of the wiring member 4, the liner expansion coefficient αBA having a difference smaller than a first predetermined value from the liner expansion coefficient αC of the semiconductor element 3, and describes that the second buffer plate 7B has a liner expansion coefficient αBB between the liner expansion coefficient αBA of the first buffer plate 7A and the liner expansion coefficient αW of the wiring member 4, the liner expansion coefficient αBB having a difference larger than the first predetermined value but smaller than a second predetermined value from the liner expansion coefficient αW of the wiring member 4 (refer to Abstract).”